Regviz

Silicon Labs /EFM32PG23B210F512IM48 /EMU_S /RSTCAUSE

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RSTCAUSE

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/EFR32MG24A010F1536GM40/EMU_NS/RSTCAUSE#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (POR)POR 0 (PIN)PIN 0 (EM4)EM4 0 (WDOG0)WDOG0 0 (WDOG1)WDOG1 0 (LOCKUP)LOCKUP 0 (SYSREQ)SYSREQ 0 (DVDDBOD)DVDDBOD 0 (DVDDLEBOD)DVDDLEBOD 0 (DECBOD)DECBOD 0 (AVDDBOD)AVDDBOD 0 (IOVDD0BOD)IOVDD0BOD 0 (VREGIN)VREGIN

Description

No Description

Fields

POR

Power On Reset
PIN

Pin Reset
EM4

EM4 Wakeup Reset
WDOG0

Watchdog 0 Reset
WDOG1

Watchdog 1 Reset
LOCKUP

M33 Core Lockup Reset
SYSREQ

M33 Core Sys Reset
DVDDBOD

HVBOD Reset
DVDDLEBOD

LEBOD Reset
DECBOD

LVBOD Reset
AVDDBOD

LEBOD1 Reset
IOVDD0BOD

LEBOD2 Reset
VREGIN

DCDC VREGIN comparator

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data